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68000
68030
CPLD
FPGA
ARM
SHOP
Systems
68000 CPU
68000 CPU-2
68000 CPU-2.1
Backplane
Backplane-2
Memory
Memory-2
Memory-3
Memory-3.1
Hex Display
Dual 6850
Jumpers
Schematic
BOM
Firmware
Address Map
Testing
Mods
Dual 6850-2
68681
68230
68230-2
ACRTC
IDE
IDE-2
Protoboard
Other Boards
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Quick Tips
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The
Dual 6850
Board
J1 A/B Select - Base Address
Placing a Jumper (as shown in RED below) sets the Base Address of the board.
$000000
$000001
JB1 Baud-C - Console Serial Port Configuration
This Jumper Block sets the Baud Rate for the Console Serial Port.
The desired option can be set with a Jumper (as shown in RED below).
9600 Baud
19200 Baud
38400 Baud
* 28800 Baud *
* 57600 Baud *
* 115200 Baud *
JB2 Baud-A - Auxiliary Serial Port Configuration
This Jumper Block sets the Baud Rate for the Auxiliary Serial Port.
The desired option can be set with a Jumper (as shown in RED below).
9600 Baud
19200 Baud
38400 Baud
* 28800 Baud *
* 57600 Baud *
* 115200 Baud *
Dual 6850 Board - Jumpers highlighted in RED
Disclaimer
All hardware designs, software, and information shared on this website is provided "as is"
without warranty of any kind and strictly for personal non-commercial use only.
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Mega-Micros Home
12 Edgefield Close
Redditch B98 7WB
ENGLAND
+44 (0)7973 265572
info@mega-micros.co.uk